1. Field of the Invention
The present invention relates to a wide-band amplifier that assures satisfactory output characteristics over a wide operation frequency range of DC to several tens of gigahertz.
2. Description of the Related Art
FIG. 12 is a circuit diagram showing a conventional wide-band amplifier capable of receiving biphase signals. In FIG. 12, reference numeral 1 denotes a differential amplifier. A level-shift first source follower circuit 2 shifts an output voltage of the differential amplifier 1 to a predetermined level. An impedance conversion second source follower circuit 3 is connected to the first source follower circuit 2. Further, symbol V.sub.SS is a voltage source; IN1, an input terminal; IN2, an inverted input terminal; OUT1, an output terminal; and OUT2, an inverted output terminal.
In the differential amplifier 1, Tr1, Tr2 and Tr3 are field-effect transistors (hereinafter abbreviated as FETs), R1 and R2 are load resistors, and D1 is a level-shift diode. In the first source follower circuit 2, Tr4 and Tr5 are source follower FETs, Tr6 and Tr7 are current source FETs, and D2 and D3 are level-shift diodes. The stage of the source follower FET Tr5 processes a signal that is inverted from a signal that is processed by the stage of the source follower FET Tr4. In the second source follower circuit 3, D4 and D5 are level-shift diodes, Tr8 and Tr9 are source follower FETs, and Tr10 and Tr11 are current source FETs. The stage of the source follower FET Tr9 processes a signal that is inverted from a signal that is processed by the stage of the source follower FET Tr8.
The operation of the wide-band amplifier having the above configuration will be described below with assumptions that a current flowing through the FET Tr3 is denoted by I.sub.C and the resistors R1 and R2 have a resistance R.sub.L. When high-level and low-level signals are respectively applied to the input terminal IN1 and the inverted input terminal IN2, the FET Tr1 is switched on and the FET Tr2 is switched off, so that the current I.sub.C flows through the FET Tr1. On the other hand, when low-level and high-level signals are respectively applied to the input terminal IN1 and the inverted input terminal IN2, the FET Tr1 is switched off and the FET Tr2 is switched on, so that the current I.sub.C flows through the FET Tr2. A signal that is output from the drain terminal of the FET Tr1 or TR2 and supplied to the first source follower circuit 2 has an amplitude .DELTA.V=R.sub.L .times.I.sub.C.
The source follower circuit 2, actually the level-shift diodes D2 and D3, performs DC level shift on a signal that has been level-shifted by the differential amplifier 1, to obtain an output level that is required for the wide-band amplifier.
FIG. 13A shows the first source follower circuit 2 being in a state that a gate voltage of the source follower FET Tr4 has just become a high level. At an instant that a high-level output signal is supplied from the differential amplifier 1 to the source follower FET Tr4, a gate-source voltage of the source follower FET Tr4 increases (by .DELTA.V.sub.H) and a drain current increases (by .DELTA.I.sub.D1). If the internal resistance (source-drain resistance R.sub.DS) of the current source FET Tr6 is sufficiently large, the drain current .DELTA.I.sub.D1 flows into the gate terminal of the source follower FET Tr8 of the second source follower circuit 3, to charge up an input capacitance C.sub.t (gate-source capacitance C.sub.GS plus gate-drain capacitance C.sub.GD) of the source follower FET Tr8. In general, a voltage V across a capacitance C is a time-integration of a current flowing therethrough, i.e., changes according to V=(1/C).intg.idt. Therefore, a gate voltage of the source follower FET Tr8, i.e., a source voltage of the source follower FET Tr4 increases by .DELTA.V.sub.H as time elapses, so that the gate-source voltage of the source follower FET Tr4 decreases by .DELTA.V.sub.H. Thus, the injection current I.sub.D1 decreases to zero.
In this case, to quickly switch the gate voltage of the source follower FET Tr8 from a low level to a high level (i.e., to reduce a rise time tr), the current .DELTA.I.sub.D1 that is drawn from the source follower FET Tr4 needs to be increased. This can be attained by increasing the size of the FET Tr4. However, if the FET Tr4 were made too large, the load (i.e., input capacitance C.sub.t of the source follower FET Tr4) with respect to an output of the prior-stage differential amplifier 1 would become unduly large, deteriorating the switching operation of the differential amplifier 1. In the wide-band amplifier of FIG. 12, the load with respect to an output of the differential amplifier 1 is reduced by using the two-stage source follower circuits 2 and 3 in which the size of the source follower FETs of the second source follower circuit 3 is larger than that of the first source follower circuit 2. Source follower circuits of more than two stages may be employed to implement a very-high-speed amplifier.
FIG. 13B shows the first source follower circuit 2 being in a state that the gate voltage of the source follower FET Tr4 has just become a low level. At an instant that a low-level output signal is supplied from the differential amplifier 1 to the source follower FET Tr4, the gate-source voltage of the source follower FET Tr4 decreases (by .DELTA.V.sub.L), so that the drain current decreases (by .DELTA.I.sub.D2) and the internal resistance increases. Since a constant current is flowing through the current source FET Tr6, to cause the source voltage of the source follower FET Tr4 by .DELTA.V.sub.L, the charge that has been stored in the input capacitance C.sub.t of the source follower FET Tr8 is released and a discharge current flows through the current source FET Tr6 as its drain current. To quickly switch the gate voltage of the source follower FET Tr8 from a high level to a low level (i.e., to reduce a fall time tf), the drain current of the current source FET Tr6 needs to be increased, resulting in increased power consumption of the entire circuit.
The principle of operation of the second source follower circuit 3 is similar to that of the first source follower circuit 2.
In the wide-band amplifier having the source follower circuits as described above, the increase of the number of stages of source follower circuits improves the high-speed switching characteristic, but deteriorates the bandwidth characteristic.
To solve this problem, an amplifier has been proposed which employs a push-pull-type source follower circuit. FIG. 14 is a circuit diagram showing a conventional amplifier of such type as disclosed in Toshiki Seshita et al.: "20 GHz 8b Multiplexer Implemented with 0.5 .mu.m WN.sub.x /W-Gate GaAs MESFETs," IEEE ISSCC Digest of Technical Papers, pp. 172-173, February 1994.
The components given the same reference symbols in FIGS. 12 and 14 are the same or corresponding ones. In FIG. 14, a differential amplifier 1 employs a level-shift resistor R4 in place of the level-shift diode D1 of FIG. 12. In a source follower circuit 4, current source FETs Tr6 and Tr7, source follower FETs Tr4 and Tr5, and diodes D2 and D3 are the same as those in the first source follower circuit 2 of FIG. 12. Gate voltages of the current source FETs Tr6 and Tr7 are given by a bias circuit including series resistors R5 and R6 and series resistors R7 and R8 that are provided between the ground and a voltage source V.sub.SS. Source voltages of the current source FETs Tr6 and Tr7 are given via diodes D4 and D5, respectively. A node ND1 at the source terminal of the source follower FET Tr4 is connected, via a capacitor C2, to a node ND4 at the gate terminal of the current source FET Tr7 of an inverted signal processing stage. A node ND2 at the source terminal of the source follower FET Tr5 of the inverted signal processing stage is connected, via a capacitor C1, to a node ND3 at the gate terminal of the current source FET Tr6.
With the above push-pull-type configuration, when a low-level signal is applied to the source follower circuit 4, the current source FET Tr6 receives an inverted signal and therefore turns on, to increase a current flowing therethrough. Thus, the current source FET Tr6 more easily draws charge stored in an input capacitance of a next-stage circuit, resulting in a shorter signal fall time tf. Conversely, when a high-level signal is applied to the source follower circuit 4, the current flowing into the current source FET Tr6 is reduced. Since the current that is allowed to flow into the next-stage input capacitance is increased as much, a signal rise time tr can be shortened. Further, since the drive currents can be controlled by switching of the current source FETs Tr6 and Tr7, the high-speed switching characteristic can be improved with almost no increase of the power consumption of the bias circuit. Still further, because the bandwidth of the source follower circuit 4 is increased by virtue of the frequency characteristics of the coupling capacitors C1 and C2, the bandwidth of the entire wide-band amplifier can be increased.
However, in the conventional wide-band amplifier using the push-pull-type source follower circuit 4, to make the gate voltages of the current source FETs Tr6 and Tr7 lower than their source voltages when they are turned off, the diodes D4 and D5 are connected to the source terminals of the respective FETs, negative feedback is effected by the internal resistances of the diodes D4 and D5. As a result, the switching characteristics of the current source FETs Tr6 and Tr7 are deteriorated, which in turn deteriorates the high-speed switching characteristic of the source follower circuit 4.